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| ADVANCE INFORMATION MICRONAS HAL710 Hall-Effect Sensor with Direction Detection Edition Feb. 20, 2001 6251-478-1AI MICRONAS HAL710 Contents Page 3 3 3 4 4 4 4 4 5 7 7 7 7 8 8 9 10 10 10 10 11 11 11 11 11 11 12 12 Section 1. 1.1. 1.2. 1.3. 1.3.1. 1.4. 1.5. 1.6. 2. 3. 3.1. 3.2. 3.3. 3.4. 3.5. 3.6. 3.7. 3.7.1. 3.7.2. 3.7.3. 4. 4.1. 4.2. 4.3. 4.4. 4.5. 4.6. 5. Title Introduction Features Applications Marking Code Special Marking of Prototype Parts Operating Junction Temperature Range Hall Sensor Package Codes Solderability Functional Description Specifications Outline Dimensions Dimensions of Sensitive Areas Positions of Sensitive Areas Absolute Maximum Ratings Recommended Operating Conditions Electrical Characteristics Magnetic Characteristics Magnetic Thresholds Matching BS1 and BS2 Hysteresis Matching Application Notes Ambient Temperature Extended Operating Conditions Signal Delay Test Mode Activation Start-up Behavior EMC and ESD Data Sheet History ADVANCE INFORMATION 2 Micronas ADVANCE INFORMATION HAL710 1.1. Features - generation of `Count Signals' and `Direction Signals' Hall-Effect Sensor with Direction Detection 1. Introduction The HAL 710 is a monolithic integrated Hall-effect sensor manufactured in CMOS technology with two independent Hall plates S1 and S2 spaced 2.35 mm apart. The device has two open-drain outputs: The 'Count Output' operates like a single latched Hall switch according to the magnetic field present at Hall plate S1 (see Fig. 3-3). The `Direction Output' indicates the direction of a linear or rotating movement of magnetic objects. In combination with an active target providing a sequence of alternating magnetic north and south poles, the sensor forms a system generating the signals required to control position, speed, and direction of the target movement. The internal circuitry evaluates the direction of the movement and updates the `Direction Output' at every edge of the `Count Signal' (rising and falling). The Direction Output is high if the target moves from Hall plate S1 to Hall plate S2. It is low if the target first passes plate S2 and later plate S1. The state of the Direction Output only changes at a rising or falling edge of the Count Output. The design ensures a setup time for the Direction Output with respect to the corresponding Count Signal edge of 1/2 clock periods (1 s minimum). The device includes temperature compensation and active offset compensation. These features provide excellent stability and matching of the switching points in the presence of mechanical stress over the whole temperature and supply voltage range. This is required by systems determining the direction from the comparison of two transducer signals. The sensor is designed for industrial and automotive applications and operates with supply voltages from 3.8 V to 24 V in the ambient temperature range from -40 C up to 125 C. The HAL 710 is available in the SMD package SOT-89B. - delay of the `Count Signals' with respect to the `Direction Signal' of 1 s minimum - switching type latching - low sensitivity - typical BON: 14.9 mT at room temperature - typical BOFF: -14.9 mT at room temperature - temperature coefficient of -2000 ppm/K in all magnetic characteristics - switching offset compensation at typically 150 kHz - operation from 3.8 V to 24 V supply voltage - operation with static magnetic fields and dynamic magnetic fields up to 10 kHz - overvoltage protection at all pins - reverse-voltage protection at VDD-pin - robustness of magnetic characteristics against mechanical stress - short-circuit protected open-drain outputs by thermal shut down - constant switching points over a wide supply voltage range - EMC corresponding to DIN 40839 1.2. Applications The HAL 710 is the optimal sensor for position-control applications with direction detection and alternating magnetic signals such as: - multipole magnet applications, - rotating speed and direction measurement, position tracking (active targets), and - window lifters. Micronas 3 HAL710 ADVANCE INFORMATION 1.3. Marking Code All Hall sensors have a marking on the package surface (branded side). This marking includes the name of the sensor and the temperature range. 1.6. Solderability All packages: according to IEC68-2-58 During soldering, reflow processing and manual reworking, a component body temperature of 260 C should not be exceeded. Components stored in the original packaging should provide a shelf life of at least 12 months, starting from the date code printed on the labels, even in environments as extreme as 40 C and 90% relative humidity. 1 VDD Type Temperature Range K E 710E HAL710 710K 1.3.1. Special Marking of Prototype Parts Prototype parts are coded with an underscore beneath the temperature range letter on each IC. They may be used for lab experiments and design-ins but are not intended to be used for qualification test or as production parts. 3 Count Output 2 Direction Output 4 GND Fig. 1-1: Pin configuration 1.4. Operating Junction Temperature Range The Hall sensors from Micronas are specified to the chip temperature (junction temperature TJ). K: TJ = -40 C to +140 C E: TJ = -40 C to +100 C The relationship between ambient temperature (TA) and junction temperature is explained in Section 4.1. on page 11. 1.5. Hall Sensor Package Codes HALXXXPA-T Temperature Range: K, or E Package: SF for SOT-89B Type: 710 Example: HAL 710SF-K Type: 710 Package: SOT-89B Temperature Range: TJ = -40 C to +140 C Hall sensors are available in a wide variety of packaging quantities. For more detailed information, please refer to the brochure: "Ordering Codes for Hall Sensors". 4 Micronas ADVANCE INFORMATION HAL710 2. Functional Description The HAL 710 is a monolithic integrated circuit with two independent subblocks consisting each of a Hall plate and the corresponding comparator. Each subblock independently switches the comparator output in response to the magnetic field at the location of the corresponding sensitive area. If a magnetic field with flux lines perpendicular to the sensitive area is present, the biased Hall plate generates a Hall voltage proportional to this field. The Hall voltage is compared with the actual threshold level in the comparator. The subblocks are designed to have closely matched switching points. The temperature-dependent bias - common to both subblocks - increases the supply voltage of the Hall plates and adjusts the switching points to the decreasing induction of magnets at higher temperatures. If the magnetic field exceeds the threshold levels, the comparator switches to the appropriate state. The built-in hysteresis prevents oscillations of the outputs. In order to achieve good matching of the switching points of both subblocks, the magnetic offset caused by mechanical stress is compensated for by use of "switching offset compensation techniques". Therefore, an internal oscillator provides a two-phase clock to both subblocks. For each subblock the Hall voltage is sampled at the end of the first phase. At the end of the second phase, both sampled and actual Hall voltages are averaged and compared with the actual switching point. The output of comparator 1 (connected to S1) directly controls the `Count Output'. The outputs of both comparators enter the `Direction Detection Block' controlling the state of the `Direction Output'. The `Direction Output' is 'high' if the edge at the output of comparator 1 precedes that at comparator 2. In the opposite case, `Direction Output' is 'low'. The previous state of the `Direction Output' is maintained between edges of the `Count Output' and in case the edges at comparator 1 and comparator 2 occur in the same clock period. Shunt protection devices clamp voltage peaks at the output pins and VDD-pin together with external series resistors. Reverse current is limited at the VDD-pin by an internal series resistor up to -15 V. No external reverse protection diode is needed at the VDD-pin for reverse voltages ranging from 0 V to -15 V. Clock t BS1 BS1on BS2 BS2on t Count Output VOH VOL Direction Output VOH VOL t Idd t 1/fosc tf t Fig. 2-1: Timing diagram Micronas 5 HAL710 ADVANCE INFORMATION 1 VDD Reverse Voltage and Overvoltage Protection Temperature Dependent Bias Hysteresis Control Test-Mode Control Short Circuit and Overvoltage Protection Hall Plate 1 Comparator 3 Switch S1 Output Count Output Hall Plate 2 Comparator Clock S2 Switch Direction Detection 2 Output Direction Output 4 GND Fig. 2-2: HAL 710 block diagram 6 Micronas ADVANCE INFORMATION HAL710 3. Specifications 3.1. Outline Dimensions 4.55 0.15 0.3 1.7 4 y 4 0.2 min. 0.25 1 0.4 0.4 1.5 3.0 2 3 0.4 x1 x2 sensitive area S1 0.2 sensitive area S2 0.2 2.55 top view 1.15 branded side 0.06 0.04 SPGS0022-5-B4/1E Fig. 3-1: Plastic Small Outline Transistor Package (SOT-89B) Weight approximately 0.035 g Dimensions in mm 3.2. Dimensions of Sensitive Areas Dimensions: 0.25 mm x 0.12 mm 3.3. Positions of Sensitive Areas SOT-89B x1+x2 x1=x2 y (2.350.001) mm 1.175 mm nominal 0.975 mm nominal Note: For all package diagrams, a mechanical tolerance of 0.05 mm applies to all dimensions where no tolerance is explicitly given. Micronas 7 HAL710 3.4. Absolute Maximum Ratings Symbol VDD -VP -IDD IDDZ VO IO IOmax IOZ TS TJ 1) 2) 3) 4) 5) ADVANCE INFORMATION Parameter Supply Voltage Supply Voltage Reverse Supply Current Supply Current through Protection Device Output Voltage Continuous Output On Current Peak Output On Current Output Current through Protection Device Storage Temperature Range Junction Temperature Range Pin No. 1 1 1 1 2, 3 2, 3 2, 3 3 Min. -15 -242) - -1003) -0.3 - - -2003) -65 -40 -40 Max. 281) 281) 501) 1003) 281) 201) 1503) 2003) 1505) 1704) 150 Unit V V mA mA V mA mA mA C C C as long, as TJmax is not exceeded with a 220- series resistance at pin 1 corresponding to test circuit 1 t < 2 ms t < 1000 h Components stored in the original packaging should provide a shelf life of at least 12 months, starting from the date code printed on the labels, even in environments as extreme as 40 C and 90% relative humidity. Stresses beyond those listed in the "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only. Functional operation of the device at these or any other conditions beyond those indicated in the "Recommended Operating Conditions/Characteristics" of this specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 3.5. Recommended Operating Conditions Symbol VDD IO VO Parameter Supply Voltage Continuous Output Current Output Voltage (output switch off) Pin No. 1 3 3 Min. 3.8 0 0 Typ. - - - Max. 24 10 24 Unit V mA V 8 Micronas ADVANCE INFORMATION HAL710 3.6. Electrical Characteristics at TJ = -40 C to +140 C, VDD = 3.8 V to 24 V, as not otherwise specified in Conditions. Typical Characteristics for TJ = 25 C and VDD = 5 V. Symbol IDD IDD VDDZ VOZ VOL VOL Parameter Supply Current Supply Current over Temperature Range Overvoltage Protection at Supply Overvoltage Protection at Output Output Voltage Output Voltage over Temperature Range IOH IOH Output Leakage Current 2,3 0.06 - 0.1 A A Output switched off, TJ = 25 C, VOH = 3.8 V to 24 V Output switched off, TJ 140 C, VOH = 3.8 V to 24 V TJ = 25 C Pin No. 1 1 Min. 2 Typ. 5.5 7 Max. 9 10 Unit mA mA Conditions TJ = 25 C 1 28.5 32 V IDD = 25 mA, TJ = 25 C, t = 20 ms IOH = 25 mA, TJ = 25 C, t = 20 ms IOL = 10 mA, TJ = 25 C IOL = 10 mA, 2,3 28 32 V 2,3 2,3 130 130 280 400 mV mV Output Leakage Current over Temperature Range 2,3 10 fosc fosc ten(O) Internal sampling frequency Internal sampling frequency over Temperature Range Enable Time of Output after Setting of VDD Output Rise Time Output FallTime Thermal Resistance Junction to Substrate Backside - - 130 100 150 150 - - kHz kHz s 50 100 VDD = 12 V, B>Bon + 2 mT or B 2,3 2,3 - - 1.2 0.2 150 1.6 200 s s K/W VDD = 12 V, RL= 20 k, CL= 20 pF VDD = 12 V, RL= 20 k, CL= 20 pF Fiberglass Substrate 30 mm x 10mm x 1.5mm, pad size see Fig. 3-2 5.0 2.0 2.0 1.0 Fig. 3-2: Recommended pad size for SOT-89B Dimensions in mm Micronas 9 HAL710 3.7. Magnetic Characteristics Output Voltage VO BHYS ADVANCE INFORMATION 3.7.2. Matching BS1 and BS2 (quasistationary: dB/dt<0.5 mT/ms) at TJ = -40 C to +140 C, VDD = 3.8 V to 24 V, as not otherwise specified Typical Characteristics for TJ = 25 C and VDD = 5 V Parameter BS1on - BS2on Min. -7.5 -7.5 -7.5 -7.5 Typ 0 0 0 0 Max. 7.5 7.5 7.5 7.5 BS1off - BS2off Min. -7.5 -7.5 -7.5 -7.5 Typ 0 0 0 0 Max. 7.5 7.5 7.5 7.5 mT mT mT mT Unit VOL BOFF 0 BON B Tj -40 C 25 C 100 C 140 C Fig. 3-3: Definition of magnetic switching points for the HAL710 Positive flux density values refer to magnetic south pole at the branded side of the package. 3.7.1. Magnetic Thresholds (quasistationary: dB/dt<0.5 mT/ms) at TJ = -40 C to +140 C, VDD = 3.8 V to 24 V, as not otherwise specified Typical Characteristics for TJ = 25 C and VDD = 5 V Parameter Tj -40 C 25 C 100 C 140 C On point BS1on, BS2on Min. 12.5 10.7 tbd 6.0 Typ. 16.3 14.9 tbd 10.9 Max. 20 19.1 tbd 16.0 Off point BS1off,, BS2off Min. -20 -19.1 tbd -16.0 Typ. -16.3 -14.9 tbd -10.9 Max. -12.5 -10.7 tbd -6.0 mT mT mT mT Unit 3.7.3. Hysteresis Matching (quasistationary: dB/dt<0.5 mT/ms) at TJ = -40 C to +140 C, VDD = 3.8 V to 24 V, as not otherwise specified Typical Characteristics for TJ = 25 C and VDD = 5 V Parameter Tj -40 C 25 C 100 C 140 C (BS1on - BS1off) / (BS2on - BS2off) Min. 0.85 0.85 0.85 0.85 Typ. 1.0 1.0 1.0 1.0 Max. 1.2 1.2 1.2 1.2 - - - - Unit 10 Micronas ADVANCE INFORMATION HAL710 4.4. Test Mode Activation In order to obtain the normal operation as described above, two external pull-up resistors with appropriate values are required to connect each output to an external supply, such that the potential at the open-drain output rises to at least 3 V in less than 10 s after having turned off the corresponding pull-down transistor or after having applied VDD. If the `Direction Output' is pulled low externally (the potential does not rise after the internal pull-down transistor has been turned off), the device enters Manufacturer Test Mode. Direction Detection is not functional in Manufacturer Test Mode. The device returns to `Normal Operation' as soon as the `Count Output' goes high. Please note, that the presence of a Manufacturer Test Mode requires appropriate measures to prevent accidental activation (e.g. in response to EMC events). 4. Application Notes 4.1. Ambient Temperature Due to the internal power dissipation, the temperature on the silicon chip (junction temperature TJ) is higher than the temperature outside the package (ambient temperature TA). TJ = TA + T At static conditions, the following equation is valid: T = IDD * VDD * Rth For typical values, use the typical parameters. For worst case calculation, use the max. parameters for IDD and Rth, and the max. value for VDD from the application. For all sensors, the junction temperature range TJ is specified. The maximum ambient temperature TAmax can be calculated as: TAmax = TJmax - T 4.2. Extended Operating Conditions All sensors fulfil the electrical and magnetic characteristics when operated within the Recommended Operating Conditions (see page 8) 4.5. Start-up Behavior Due to the active offset compensation, the sensors have an initialization time (enable time ten(O)) after applying the supply voltage. The parameter ten(O) is specified in the Electrical Characteristics (see page 9) During the initialization time, the output states are not defined and the outputs can toggle. After ten(O) both outputs will be either high or low for a stable magnetic field (no toggling) and the `Count Output' will be low if the applied magnetic field B exceeds BON. The `Count Output' will be high if B drops below BOFF. The `Direction Output' will have the correct state after the second edge (rising or falling) in the same direction. The device contains a Power-On Reset circuit (POR) generating a reset when VDD rises. This signal is used to initialize both outputs in the `Off-state' (i.e. Output High) and to disable Test Mode. The generation of this Reset Signal is guaranteed when VDD at the chip rises to minimum 3.8 V in less than 4 s monotonically. If this condition is violated, the internal reset signal might be missing. Under these circumstances the chip will still operate according to the specification, but the risk of toggling outputs during ten(O) increases and for magnetic fields between BOFF and BON, the output states of the Hall sensor after applying VDD will be either low or high. In order to achieve a well defined output state, the applied magnetic field then must exceed BONmax, respectively drop below BOFFmin. Supply Voltage Below 3.8 V Typically, the sensors operate with supply voltages above 3 V, however, below 3.8 V some characteristics may be outside the specification. Note: The functionality of the sensor below 3.8 V is not tested. For special test conditions, please contact Micronas. 4.3. Signal Delay The extra circuitry required for the direction detection increases the latency of the `Count and Direction Signal' compared to a simple switch (e.g. HAL 525). This extra delay corresponds to 0.5 and 1 clock period for the `Direction Signal' and `Count Signal' respectively. Micronas 11 HAL710 4.6. EMC and ESD For applications that cause disturbances on the supply line or radiated disturbances, a series resistor and a capacitor are recommended (see Fig. 4-1). The series resistor and the capacitor should be placed as closely as possible to the Hall sensor. Please contact Micronas for detailed investigation reports with EMC and ESD results. ADVANCE INFORMATION RV 220 1 VDD VEMC VP 4.7 nF 3 Count Output 2 Direction Output 20 pF 20 pF RL 2.4 k RL 2.4 k 4 GND Fig. 4-1: Test circuit for EMC investigations 5. Data Sheet History 1. Advance Information: "HAL710 Hall-Effect Sensor with Direction Detection", Feb. 20, 2001, 6251-478-1AI. First release of the advance information. Micronas GmbH Hans-Bunte-Strasse 19 D-79108 Freiburg (Germany) P.O. Box 840 D-79008 Freiburg (Germany) Tel. +49-761-517-0 Fax +49-761-517-2174 E-mail: docservice@micronas.com Internet: www.micronas.com Printed in Germany Order No. 6251-478-1AI All information and data contained in this data sheet are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. Any new issue of this data sheet invalidates previous issues. Product availability and delivery are exclusively subject to our respective order confirmation form; the same applies to orders based on development samples delivered. By this publication, Micronas GmbH does not assume responsibility for patent infringements or other rights of third parties which may result from its use. Further, Micronas GmbH reserves the right to revise this publication and to make changes to its content, at any time, without obligation to notify any person or entity of such revisions or changes. No part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of Micronas GmbH. 12 Micronas |
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